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ADM1034
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Table 43. REGISTER 0X07, FAN BEHAVIOR REGISTER, POWER-ON DEFAULT 0X09, LOCK = Y, S/W RESET = Y
Bit
Name
R/W
Description
7
Fan 2 Off
R/W
Set this bit to 1 to switch off Fan 2
6
Fan 1 Off
R/W
Set this bit to 1 to switch off Fan 1
5
Res
R
Reserved
4
Res
R
Reserved
<3:2>
DRIVE2 BHVR
R/W
These bits determine which temperature source controls the DRIVE2 output
00 = Local temperature controls DRIVE2
01 = Remote 1 temperature controls DRIVE2
10 = Remote 2 temperature controls DRIVE2
11 = DRIVE2 full speed
<1:0>
DRIVE1 BHVR
R/W
These bits determine which temperature source controls the DRIVE1 output
00 = Local temperature controls DRIVE1
01 = Remote 1 temperature controls DRIVE1
10 = Remote 2 temperature controls DRIVE1
11 = DRIVE1 full speed
Table 44. REGISTER 0X08, MASK REGISTER 1, POWER-ON DEFAULT 0X52, LOCK = N, S/W RESET = Y
Bit
Name
R/W
Description
7
Local High
R/W
A 1 disables the corresponding interrupt status bit from causing the interrupt output to
be set. The status bit is not affected. Default = 0.
6
Local Low
R/W
A 1 disables the corresponding interrupt status bit from causing the interrupt output to
be set. The status bit is not affected. Default = 1.
5
Remote 1 High
R/W
A 1 disables the corresponding interrupt status bit from causing the interrupt output to
be set. The status bit is not affected. Default = 0.
4
Remote 1 Low
R/W
A 1 disables the corresponding interrupt status bit from causing the interrupt output to
be set. The status bit is not affected. Default = 1.
3
Remote 1 Diode Error
R/W
A 1 disables the corresponding interrupt status bit from causing the interrupt output to
be set. The status bit is not affected. Default = 0.
2
Remote 2 High
R/W
A 1 disables the corresponding interrupt status bit from causing the interrupt output to
be set. The status bit is not affected. Default = 0.
1
Remote 2 Low
R/W
A 1 disables the corresponding interrupt status bit from causing the interrupt output to
be set. The status bit is not affected. Default = 1.
0
Remote 2 Diode Error
R/W
A 1 disables the corresponding interrupt status bit from causing the interrupt output to
be set. The status bit is not affected. Default = 0.
Table 45. REGISTER 0X09, MASK REGISTER 2, POWER-ON DEFAULT 0X18, LOCK = N, S/W RESET = Y
Bit
Name
R/W
Description
<7:5>
Unused
R
Unused
4
THERM
 %
R/W
A 1 disables the corresponding interrupt status bit, preventing it from causing the
interrupt output. The status bit is not affected. Default = 1.
3
THERM
 Assert
R/W
A 1 disables the corresponding interrupt status bit, preventing it from causing the
interrupt output. The status bit is not affected. Default = 0.
2
THERM
_State
R/W
A 1 disables the corresponding interrupt status bit, preventing it from causing the
interrupt output. The status bit is not affected. Default = 0. This bit has no effect in
ALERT
 comparator mode, because the corresponding status bit does not generate an
ALERT
 in that mode.
<1:0>
Unused
R
Unused
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